The Hong Kong Polytechnic University (PolyU) has announced a breakthrough in transistor technology that could redefine the future of computing. A research team led by Prof. Jianhua HAO, Head of the Department of Physics and Materials and Chair Professor of Materials Physics and Devices at PolyU, has developed a novel tunnelling field-effect transistor (TFET) using 2D nanomaterials. This innovation overcomes the physical 'Boltzmann limit' that has constrained conventional semiconductor technology, offering the fundamentals for energy-efficient computing and next-generation AI chips.
Conventional transistors rely on thermionic emission of electrical charges, which requires a minimum gating voltage of 60 millivolts (mV). However, the Boltzmann limit makes subthreshold swing (SS) values below 60 mV per decade physically impossible at room temperature, restricting the energy efficiency of traditional transistors. Prof. Hao's team has engineered a TFET that adopts quantum tunnelling to break through this boundary, achieving SS values well below the 60 mV decade⁻¹ limit. This breakthrough paves the way for ultra-low-power, high-performance integrated circuits essential for emerging AI chips and advanced semiconductor applications.
The research, published in the prestigious journal Science, was conducted in collaboration with the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design. The team created an ultra-thin heterostructure of 2D bismuth and indium selenide alternating layers using pulsed laser deposition. By exercising precise control over the layer structure, the normally semi-metallic bismuth transforms into a semiconductor in 2D form, allowing charge carriers to tunnel efficiently into indium selenide through quantum tunnelling.
The resulting TFET operates at room temperature on silicon substrates and requires a gate-voltage range of only 160 mV, far lower than the 800 mV originally needed. This significant reduction in voltage translates to lower power consumption and improved efficiency. Moreover, the device resolves a challenge in experimental TFETs by delivering a high output current alongside an exceptionally high ON/OFF current ratio. This combination enables the device to drive multiple downstream logic gates and diminish circuit delay, which is critical for complex integrated circuits.
The implications of this development are vast. As the demand for artificial intelligence and high-performance computing grows, the energy consumption of traditional chips becomes a mounting concern. By breaking the Boltzmann limit, this TFET technology could lead to chips that are not only faster but also far more energy-efficient, reducing the carbon footprint of data centers and enabling more powerful AI applications. The ability to operate on silicon substrates also means that this technology can be integrated into existing manufacturing processes, potentially accelerating its adoption.
Prof. Hao emphasized the importance of this work: 'By adopting quantum tunnelling, our TFET breaks through this boundary, paving the way for ultra-low-power, high-performance integrated circuits essential for emerging AI chips and advanced semiconductor applications.' The research demonstrates a fundamental advance in materials science and device engineering, with the potential to reshape the semiconductor industry.
